Clussys is a high-tech enterprise focused on domestic high-speed interconnect chips and AI computing architecture solutions. Concentrating on cutting-edge CXL and UALink interconnect technologies, we deliver interconnect algorithms, self-developed chips, and integrated end-to-end solutions for AI data centers and cloud service providers. Rooted in core computing-power technologies and localized deployment, we are committed to making AI computing infrastructure broadly accessible.
Facing the new challenges posed by AI computing and supercomputing centers for data transmission in the era of big data, generative AI, and large-scale computing, Clussys focuses on core technologies for AI network vertical scaling (Scale-Up). The company is deeply engaged in two cutting-edge standards—CXL and UALink—to provide high-bandwidth, low-latency, and energy-efficient interconnect solutions for intelligent computing centers and supercomputing centers, helping to overcome computing power bottlenecks.
Leveraging a standardized PCIe interface, CXL technology enables efficient interconnection between CPUs and between CPUs and accelerators. Clussys has introduced an 8-way CPU interconnect verification solution based on CXL, significantly reducing the cost and complexity of developing multi-processor servers. Additionally, the company has released a PCIe/Ethernet converged distributed storage solution that breaks through the limitations of traditional storage in terms of density and power consumption, offering scalable, cost-effective, and energy-efficient storage expansion for large-scale data centers.
Integrating CXL technology with a proprietary SVBM inference optimization engine, enabling users to run large-parameter models locally at lower hardware cost, especially suited to SMB scenarios.
The rapid development of large AI models has led to a surge in computing power demand, which can no longer be met by a single chip. This necessitates clustering multiple GPU or AI chips. As advanced process nodes face limitations and Moore’s Law gradually loses effectiveness, multi-GPU interconnect becomes critical. UALink protocol has attracted widespread attention for its minimalist design and open ecosystem, aiming to tackle technical challenges such as ultra-high speed and ultra-large bandwidth in GPU interconnect.
Specializing in network system architecture design, high-speed interconnection algorithms, chips, and overall hardware solution design.
